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(parent: 6622732) | patch
[ARM] Add MachineVerifier logic for some Thumb1 instructions.
authorEli Friedman <efriedma@quicinc.com>
Fri, 15 Mar 2019 21:44:49 +0000 (21:44 +0000)
committerEli Friedman <efriedma@quicinc.com>
Fri, 15 Mar 2019 21:44:49 +0000 (21:44 +0000)
commit68d9a60573fad118225d5e19303132f75c389936
treee6d45c240638d4cde36650098e05a2a62b35284ctree | snapshot
parent6622732d9ab1945923563ca60e780db1566541cbcommit | diff
[ARM] Add MachineVerifier logic for some Thumb1 instructions.

tMOVr and tPUSH/tPOP/tPOP_RET have register constraints which can't be
expressed in TableGen, so check them explicitly. I've unfortunately run
into issues with both of these recently; hopefully this saves some time
for someone else in the future.

Differential Revision: https://reviews.llvm.org/D59383

llvm-svn: 356303
llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp diff | blob | history
llvm/test/CodeGen/ARM/machine-verifier.mir [new file with mode: 0644] blob
Domain: System / Toolchain;