drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 11 Jun 2018 17:18:24 +0000 (18:18 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Tue, 12 Jun 2018 08:09:38 +0000 (09:09 +0100)
commit68a8570375df647cf8b6626d63917b564dd9390e
tree33e39d284e7fe83c6285d29893a610a888e2833c
parent467d35789e5a4f47428b65ef711b30fdabbb0fd4
drm/i915/gtt: Invalidate GGTT caches after writing the gen6 page directories

When we update the gen6 ppgtt page directories, we do so by writing the
new address into a reserved slot in the GGTT. It appears that when the
GPU reads that entry from the gsm, it uses its small cache and that we
need to invalidate that cache after writing. We don't see an issue
currently as we prefill the ppgtt page directories on creation; and only
create the single aliasing_ppgtt long before we start using the GGTT
(and so before the cache may have a conflicting entry).

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Cc: Matthew Auld <matthew.william.auld@gmail.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180611171825.13678-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/i915_gem_gtt.c