[x86][inline-asm][AVX512][llvm][PART-2]
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 16:19:58 +0000 (16:19 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Mon, 31 Oct 2016 16:19:58 +0000 (16:19 +0000)
commit68a5c536169af940fdcb9c17ddc102422bb8f561
treee07e28c438565f6c80657951bd696137c6a4e115
parent54bfd548aa139a331d1c3fdff691c70dfd409986
[x86][inline-asm][AVX512][llvm][PART-2]
Introducing "k" and "Yk" constraints for extended inline assembly, enabling use of AVX512 masked vectorized instructions.

Commit on behalf of mharoush

Extending inline assembly support, compatible with GCC as folowing:
"k" constraint hints the compiler to select any of AVX512 k0-k7 registers.
"Yk" constraint is a subset of "k" excluding k0 which is not allowd to be used as a mask.

Reviewer: 1. rnk

Differential Revision: https://reviews.llvm.org/D25062

llvm-svn: 285591
llvm/lib/Target/X86/X86ISelLowering.cpp