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(parent: 35fe191) | patch
drm/amd/display: Enable timing sync on DCN32
authorAlvin Lee <Alvin.Lee2@amd.com>
Thu, 20 Oct 2022 15:46:51 +0000 (11:46 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 27 Oct 2022 18:43:50 +0000 (14:43 -0400)
commit6894534b56059f68a96a3fcf357e15671de0d24e
tree5cf36fa2e503210c7ed66382d779e431cc322640tree | snapshot
parent35fe1915eebde4546cea5fd4e86e76f47d7b5daecommit | diff
drm/amd/display: Enable timing sync on DCN32

Missed enabling timing sync on DCN32 because DCN32 has a different DML
param.

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alvin Lee <Alvin.Lee2@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c diff | blob | history
Domain: System / Kernel;