riscv: dts: microchip: add the mpfs' fabric clock control
authorConor Dooley <conor.dooley@microchip.com>
Tue, 20 Sep 2022 09:31:55 +0000 (10:31 +0100)
committerConor Dooley <conor.dooley@microchip.com>
Wed, 19 Oct 2022 16:32:44 +0000 (17:32 +0100)
commit6863aaa88516292b885fdce5dd91925a00c3a3de
tree61c6959711acd7894360e47c01a8c4e6cec8a060
parent9abf2313adc1ca1b6180c508c25f22f9395cc780
riscv: dts: microchip: add the mpfs' fabric clock control

The "fabric clocks" in current PolarFire SoC device trees are not
really fixed clocks. Their frequency is set by the bitstream, so having
them located in -fabric.dtsi is not a problem - they're just as "fixed"
as the IP blocks etc used in the FPGA fabric.
However, their configuration can be read at runtime (and to an extent
they can be controlled, although the intended usage is static
configurations set by the bitstream) through the system controller bus.

In the v2022.09 icicle kit reference design a single CCC (north-west
corner) is enabled, using a 50 MHz off-chip oscillator as its reference.

Updating to the v2022.09 icicle kit reference design is required, as
prior to this release, the CCC was not fixed & could change for any
given run of the synthesis tool.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
arch/riscv/boot/dts/microchip/mpfs-icicle-kit-fabric.dtsi
arch/riscv/boot/dts/microchip/mpfs-icicle-kit.dts
arch/riscv/boot/dts/microchip/mpfs.dtsi