[X86] Set some more plausible latencies for horizontal add/subs on znver1

[X86] Set some more plausible latencies for horizontal add/subs on znver1

These are all microcoded/multi-pipe nightmares on Ryzen, but we shouldn't just be using the WriteMicrocoded class which is for REALLY bad microcoded nightmares - instead use the same approximate latencies as znver2 (Agner and uops.info both suggest similar values) - and make sure we use the FPU defs for both

Fixes #53242