GBE: Consolidate all read/write instruction's bti handling.
authorZhigang Gong <zhigang.gong@intel.com>
Wed, 28 May 2014 02:27:36 +0000 (10:27 +0800)
committerZhigang Gong <zhigang.gong@intel.com>
Wed, 28 May 2014 08:05:31 +0000 (16:05 +0800)
commit68204669b80899944ced2c553282b5cdcc136ba9
treee3332a7c620d7b1e349cc62ff24a001093792ea3
parent3d8ea972a4a825b12c2b7deb41edf87b6e338f5d
GBE: Consolidate all read/write instruction's bti handling.

The previous bti handling for each read/write instruction is
slightly different from each other. There are two major bugs,
the OP_ATOMIC store the bti in different position, so the
post scheduling for ATOMIC instruction is buggy.
The second bug is the DWORD_GATHER instruction is not in
the isRead list. That may cause potential bug.

This patch fixes both of them.

Signed-off-by: Zhigang Gong <zhigang.gong@intel.com>
Reviewed-by: Yang Rong <rong.r.yang@intel.com>
backend/src/backend/gen_context.cpp
backend/src/backend/gen_insn_scheduling.cpp
backend/src/backend/gen_insn_selection.cpp
backend/src/backend/gen_insn_selection.hpp