[X86][Costmodel] Load/store i16 Stride=3 VF=32 interleaving costs
authorRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:37:23 +0000 (23:37 +0300)
committerRoman Lebedev <lebedev.ri@gmail.com>
Sun, 3 Oct 2021 20:40:35 +0000 (23:40 +0300)
commit67f1ee2e38e83af34b58e3873bd4ba6dec7f5c50
treeb2111b5a4e74e07cff4c67f76d037179067afd77
parent3cbc0a07f92b4a630a1c03a6587d52f206ec8248
[X86][Costmodel] Load/store i16 Stride=3 VF=32 interleaving costs

The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3

For load we have:
https://godbolt.org/z/rMaYr67hz - for intels `Block RThroughput: =56.0`; for ryzens, `Block RThroughput: <=17.8`
So pick cost of `56`.

For store we have:
https://godbolt.org/z/eMsbKqnvv - for intels `Block RThroughput: <=54.0`; for ryzens, `Block RThroughput: <=15.0`
So pick cost of `54`.

I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D111018
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-3.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-3.ll