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(parent: ce8af45) | patch
radeon: implement 2D tiling for CIK
authorMarek Olšák <marek.olsak@amd.com>
Fri, 22 Nov 2013 22:31:13 +0000 (23:31 +0100)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 22 Nov 2013 23:35:39 +0000 (00:35 +0100)
commit67d92404d62044972599dcef3011d17fca46eed5
treeeab74c852d5271e5caaf26257505c68352428eb3tree | snapshot
parentce8af454259279c14c44bcd32c429640ca5e1691commit | diff
radeon: implement 2D tiling for CIK

Bug fixes and simplification by Marek.
We have to use the tile index of 0 for non-MSAA depth-stencil after all.

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Reviewed-and-Tested-by: Michel Dänzer <michel.daenzer@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
include/drm/radeon_drm.h diff | blob | history
radeon/radeon_surface.c diff | blob | history
radeon/radeon_surface.h diff | blob | history
Domain: System / Kernel;