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(parent: 25fbb71) | patch
clk: starfive: pll: Remove high frequency of PLL0
authorXingyu Wu <xingyu.wu@starfivetech.com>
Thu, 15 Dec 2022 06:48:40 +0000 (14:48 +0800)
committerXingyu Wu <xingyu.wu@starfivetech.com>
Thu, 15 Dec 2022 06:48:46 +0000 (14:48 +0800)
commit67d314a2c9a996464a3c65a1636211502b9fb615
treef4f3d023124b396c07c711c8e9f41cccb4c3e95etree | snapshot
parent25fbb716f1aefafb731082d5d571ea040d5d51a4commit | diff
clk: starfive: pll: Remove high frequency of PLL0

Remove high frequency of PLL0 and make sure PLL0 max frequency is 1.5GHz.

Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
drivers/clk/starfive/clk-starfive-jh7110-pll.h diff | blob | history
Domain: System / Kernel;