[mlir][Vector] Allow a 0-d for for vector transfer ops.
authorNicolas Vasilache <nicolas.vasilache@gmail.com>
Tue, 12 Oct 2021 11:37:55 +0000 (11:37 +0000)
committerNicolas Vasilache <nicolas.vasilache@gmail.com>
Tue, 12 Oct 2021 11:48:42 +0000 (11:48 +0000)
commit67b10532c637b22c0926517d27f84759893a7258
tree63d05203b7edbc7bdb3a7fa297ecf1a82361b770
parent8f1650cb6501408f9ad03c526af3bcd1f57ef48f
[mlir][Vector] Allow a 0-d for for vector transfer ops.

This revision updates the op semantics, printer, parser and verifier to allow 0-d transfers.
Until 0-d vectors are available, such transfers have a special form that transits through vector<1xt>.
This is a stepping stone towards the longer term work of adding 0-d vectors and will help significantly reduce corner cases in vectorization.

Transformations and lowerings do not yet support this form, extensions will follow.

Differential Revision: https://reviews.llvm.org/D111559
mlir/include/mlir/Dialect/Vector/VectorOps.td
mlir/include/mlir/Interfaces/VectorInterfaces.td
mlir/lib/Dialect/Vector/VectorOps.cpp
mlir/lib/Dialect/Vector/VectorUtils.cpp
mlir/test/Dialect/Vector/invalid.mlir
mlir/test/Dialect/Vector/ops.mlir