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[AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen
authorDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Wed, 20 Nov 2019 14:04:36 +0000 (17:04 +0300)
committerDmitry Preobrazhensky <dmitry.preobrazhensky@amd.com>
Wed, 20 Nov 2019 14:57:50 +0000 (17:57 +0300)
commit6778a62eb0d222dc625b8785516f027df12aaf16
treeeaa6be7399b18755510ca79c746aa7ed60279693tree | snapshot
parenta21940eac149dc03d9e028023bbd059f871af1c5commit | diff
[AMDGPU][GFX10] Disabled v_movrel*[sdwa|dpp] opcodes in codegen

These opcodes use indirect register addressing so they need special handling by codegen (currently missing).

Reviewers: vpykhtin, arsenm, rampitec

Differential Revision: https://reviews.llvm.org/D70400
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp diff | blob | history
llvm/lib/Target/AMDGPU/SIInstrInfo.h diff | blob | history
Domain: System / Toolchain;