projects / platform / upstream / llvm.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 4ac51dd) | patch
[AArch64] Add FP16 instructions to isAssociativeAndCommutative
authorKAWASHIMA Takahiro <t-kawashima@fujitsu.com>
Mon, 12 Dec 2022 05:25:31 +0000 (14:25 +0900)
committerKAWASHIMA Takahiro <t-kawashima@fujitsu.com>
Tue, 20 Dec 2022 14:47:51 +0000 (23:47 +0900)
commit673b4ad64577e3336cb8109869919b21341e0d74
treead46f7e4608b713f01bb6f21a96f19f7c460eb3dtree | snapshot
parent4ac51dd53d93b8dd18c58093766483c657fe3a08commit | diff
[AArch64] Add FP16 instructions to isAssociativeAndCommutative

`-mcpu=` in `llvm/test/CodeGen/AArch64/machine-combiner.ll` is changed
to `neoverse-n2` to use FP16 and SVE/SVE2 instructions. By this, the
register allocation and/or instruction scheduling are slightly changed
and some existing `CHECK` lines need to be updated.

Differential Revision: https://reviews.llvm.org/D139809
llvm/lib/Target/AArch64/AArch64InstrInfo.cpp diff | blob | history
llvm/test/CodeGen/AArch64/machine-combiner.ll diff | blob | history
Domain: System / Toolchain;