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(parent: 8bddf67) | patch
ddr: marvell: update ddr controller init and freq
authorChris Packham <judge.packham@gmail.com>
Thu, 18 Jan 2018 04:16:10 +0000 (17:16 +1300)
committerStefan Roese <sr@denx.de>
Fri, 19 Jan 2018 15:30:29 +0000 (16:30 +0100)
commit672e5598301b63f95d7dcceb4436f3cb40643f88
treed3bcd98cfca254c60516e15ff4b55ee052510d36tree | snapshot
parent8bddf678dbe3c766d4f1c242cda3b9e3ed9e2425commit | diff
ddr: marvell: update ddr controller init and freq

Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
drivers/ddr/marvell/a38x/ddr3_topology_def.h diff | blob | history
drivers/ddr/marvell/a38x/ddr3_training.c diff | blob | history
drivers/ddr/marvell/a38x/ddr3_training_db.c diff | blob | history
Domain: System / Kernel;