AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 17 May 2020 14:51:22 +0000 (10:51 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 22 May 2020 14:31:44 +0000 (10:31 -0400)
commit66fe60220ca2b1932e06093294c72b246be54ec8
tree389d79d80f57164f7c12b89bcd3e665a8083f6ef
parent5a230a19ad0fa52bd7aa2169b2f0abc6b2bc47df
AMDGPU/GlobalISel: Fix masked control flow with fallthrough blocks

Unlike SelectionDAGBuilder, IRTranslator omits the unconditional
branch in fallthrough cases. Confusingly, the control flow pseudos
function in the opposite way the intrinsics are used, and the branch
targets always need to be swapped. We're inverting the target blocks,
so we need to figure out the old fallthrough block and insert a branch
to the original unconditional branch target.
llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.if.xfail.mir [new file with mode: 0644]
llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll