[RISCV] Implement codegen for cmpxchg on RV32IA
authorAlex Bradbury <asb@lowrisc.org>
Thu, 29 Nov 2018 20:43:42 +0000 (20:43 +0000)
committerAlex Bradbury <asb@lowrisc.org>
Thu, 29 Nov 2018 20:43:42 +0000 (20:43 +0000)
commit66d9a752b9c4c7de32f21f921d1678799a254259
tree883e834f03d6c63309867b074bdb2658180989b9
parent7eb1c2864fb3b3482432bb979f40c740ca99f023
[RISCV] Implement codegen for cmpxchg on RV32IA

Utilise a similar ('late') lowering strategy to D47882. The changes to
AtomicExpandPass allow this strategy to be utilised by other targets which
implement shouldExpandAtomicCmpXchgInIR.

All cmpxchg are lowered as 'strong' currently and failure ordering is ignored.
This is conservative but correct.

Differential Revision: https://reviews.llvm.org/D48131

llvm-svn: 347914
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/CodeGen/AtomicExpandPass.cpp
llvm/lib/Target/RISCV/RISCVExpandPseudoInsts.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/lib/Target/RISCV/RISCVInstrInfoA.td
llvm/test/CodeGen/RISCV/atomic-cmpxchg.ll