AMDGPU: Serialize MFI spill fields
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 24 Jul 2020 01:11:46 +0000 (21:11 -0400)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Wed, 29 Jul 2020 00:01:57 +0000 (20:01 -0400)
commit66d60e06cbc51b453f9e38ad69795f9487213fe5
tree476eb8668642c2fcef7d5098fadc8be5e50dba4a
parentfb22678cd67801e41af4917acceb4014ab5d007e
AMDGPU: Serialize MFI spill fields

These should probably be inferred from the function on parse, but the
target specific infrastructure currently does not give you a way to do
this. SILowerSGPRSpills early exits without this reporting spills,
which makes it difficult to write a MIR test for.
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
llvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll