drm/i915/vlv: fix RC6 residency time calculation
authorImre Deak <imre.deak@intel.com>
Mon, 1 Jun 2015 07:32:01 +0000 (10:32 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 15 Jun 2015 09:56:37 +0000 (11:56 +0200)
commit66c826a1754c07012e29fbe9be7013e92a5acbac
tree737eb8738acb68d04e0e4b0c0c8673f430135519
parent3320e37f7ac1f4df90268f204fef490dacee7ca0
drm/i915/vlv: fix RC6 residency time calculation

The divider value to convert from CZ clock rate to ms needs a +1
adjustment on VLV just like on CHV. This matches both the spec and
the accuracy test by pm_rc6_residency.

v2:
- simplify logic checking for the CHV 320MHz special case (Rodrigo)

Testcase: igt/pm_rc6_residency
Signed-off-by: Imre Deak <imre.deak@intel.com>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=76877
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_sysfs.c