drivers/ddr/fsl: Update DDR driver for DDR4
authorYork Sun <yorksun@freescale.com>
Thu, 19 Mar 2015 16:30:26 +0000 (09:30 -0700)
committerYork Sun <yorksun@freescale.com>
Thu, 23 Apr 2015 15:55:53 +0000 (08:55 -0700)
commit66869f955417b89dbf6b7cbb72738b2205a26bf8
tree669eca4ca7d0e4d6d62ce480455d346f2b192f2f
parentf8cb101e1e3f5ee2007b78b6b12e24120385aeac
drivers/ddr/fsl: Update DDR driver for DDR4

Add/update registers for DDR4, including DQ mappings. Allow raw timing
method used for all controllers. Update mode_9 register to 0x500 for
improved stability. Check DDR controller version number individually
in case a SoC has multiple DDR controllers of different versions.
Increase read-write turnaround for DDR4 high speeds.

Signed-off-by: York Sun <yorksun@freescale.com>
drivers/ddr/fsl/ctrl_regs.c
drivers/ddr/fsl/interactive.c
drivers/ddr/fsl/main.c
drivers/ddr/fsl/util.c
include/fsl_ddr.h