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(parent: 4051e12) | patch
target-arm: Correctly handle PSTATE.SS when taking exception to AArch32
authorPeter Maydell <peter.maydell@linaro.org>
Tue, 19 Aug 2014 17:56:26 +0000 (18:56 +0100)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 19 Aug 2014 18:02:03 +0000 (19:02 +0100)
commit662cefb7753c1f04d960b443c60e7622c83144d3
tree2116183e3c60a028c2628fcb32e09ebd445b2fdftree | snapshot
parent4051e12c5df1c46b542b28ed43f1614a42245ecfcommit | diff
target-arm: Correctly handle PSTATE.SS when taking exception to AArch32

When an exception is taken to AArch32, we must clear the PSTATE.SS
bit for the exception handler, and must also ensure that the SS bit
is not set in the value saved to SPSR_<mode>. Achieve both of these
aims by clearing the bit in uncached_cpsr before saving it to the SPSR.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
target-arm/helper.c diff | blob | history
Domain: SDK / Emulator;