[LLDB] Fix SVE reginfo for sequential offset in g packet
authorMuhammad Omair Javaid <omair.javaid@linaro.org>
Tue, 17 Nov 2020 12:15:38 +0000 (17:15 +0500)
committerMuhammad Omair Javaid <omair.javaid@linaro.org>
Tue, 17 Nov 2020 12:18:34 +0000 (17:18 +0500)
commit661e4040ac60b3df06b2495ea916302b35d9bac2
treeb85f8b09e1cab5ea1c17335d30a2ec8779122ac4
parent537cbd90c43dd9b166fa8f03347b1397505140e5
[LLDB] Fix SVE reginfo for sequential offset in g packet

This moves in the direction of our effort to synchronize register descriptions
between LLDB and GDB xml description. We want to able to send registers in a
way that their offset fields can be re-constructed based on register sizes
in the increasing order of register number.

In context to Arm64 SVE, FPCR and FPSR are same registers in FPU regset and
SVE regset. Previously FPSR/FPCR offset was set at the end of SVE data
because Linux ptrace data placed FPCR and FPSR at the end of SVE register set.

Considering interoperability with other stubs like QEMU and that g packets
should generate register data in increasing order of register numbers. We
have to move FPCR/FPSR offset up to its original location according to
register numbering scheme of ARM64 registers with SVE registers included.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D90741
lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.cpp
lldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm64.cpp