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(parent: 5e8d771) | patch
Fix ICE on empty FIQ interrupt handler on ARM
authorThomas Preud'homme <thomas.preudhomme@arm.com>
Wed, 16 Nov 2016 18:30:56 +0000 (18:30 +0000)
committerThomas Preud'homme <thopre01@gcc.gnu.org>
Wed, 16 Nov 2016 18:30:56 +0000 (18:30 +0000)
commit660e6c2c127fdec06bfa428b08ab4123e37281a5
tree0e26028c9bf60b7ec7247434464570e6f1dc6643tree | snapshot
parent5e8d7713becd848449a35231d58b8b0965467784commit | diff
Fix ICE on empty FIQ interrupt handler on ARM

2016-11-16  Thomas Preud'homme  <thomas.preudhomme@arm.com>

    gcc/
    * config/arm/arm.md (arm_addsi3): Add alternative for addition of
    general register with general register or ARM constant into SP
    register.

    gcc/testsuite/
    * gcc.target/arm/empty_fiq_handler.c: New test.

From-SVN: r242508
gcc/ChangeLog diff | blob | history
gcc/config/arm/arm.md diff | blob | history
gcc/testsuite/ChangeLog diff | blob | history
gcc/testsuite/gcc.target/arm/empty_fiq_handler.c [new file with mode: 0644] blob
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