ARM: ls102xa: Setting device's stream id for SMMUs.
authorXiubo Li <Li.Xiubo@freescale.com>
Fri, 21 Nov 2014 09:40:59 +0000 (17:40 +0800)
committerYork Sun <yorksun@freescale.com>
Thu, 11 Dec 2014 17:42:22 +0000 (09:42 -0800)
commit660673af4fd10c544ceeedeb524ba92c27dbc586
tree2979c885f915d9aa5561a7977ac2c1b3543aa0ff
parente87f3b308c454f6e78b02da857936c7d012c385b
ARM: ls102xa: Setting device's stream id for SMMUs.

LS1 has 4 SMMUs for address translation of the masters. All the
SMMUs' stream IDs are 8-bit. The address translation depends on the
stream ID of the incoming transaction.
Each master has unique stream ID assigned to it and is configurable
through SCFG registers. The stream ID for the masters is identical
and share the same register field of STREAM ID registers.

Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>
arch/arm/include/asm/arch-ls102xa/ls102xa_stream_id.h [new file with mode: 0644]
board/freescale/common/Makefile
board/freescale/common/ls102xa_stream_id.c [new file with mode: 0644]
board/freescale/ls1021aqds/ls1021aqds.c
board/freescale/ls1021atwr/ls1021atwr.c
include/configs/ls1021aqds.h
include/configs/ls1021atwr.h