[arm][5/X] Implement Q-bit-setting SIMD32 intrinsics

[arm][5/X] Implement Q-bit-setting SIMD32 intrinsics

This patch implements some more Q-setting intrinsics of the
multiply-accumulate
variety, but these are in the SIMD32 family in that they treat their
operands as packed SIMD values, but that's not important at the RTL level.

	* config/arm/arm.md (arm_<simd32_op><add_clobber_q_name>_insn):
	New define_insns.
	(arm_<simd32_op>): New define_expands.
	* config/arm/arm_acle.h (__smlad, __smladx, __smlsd, __smlsdx,
	__smuad, __smuadx): Define.
	* config/arm/arm_acle_builtins.def: Define builtins for the above.
	* config/arm/iterators.md (SIMD32_TERNOP_Q): New int_iterator.
	(SIMD32_BINOP_Q): Likewise.
	(simd32_op): Handle the above.
	* config/arm/unspecs.md: Define unspecs for the above.

	* gcc.target/arm/acle/simd32.c: Update test.

From-SVN: r277918