Add LiveRangeShrink pass to shrink live range within BB.
authorDehao Chen <dehao@google.com>
Fri, 12 May 2017 19:29:27 +0000 (19:29 +0000)
committerDehao Chen <dehao@google.com>
Fri, 12 May 2017 19:29:27 +0000 (19:29 +0000)
commit65dd23e273c5ef69e8ae843ee4fd4664a61d95e9
tree4b9e6e179fbbefa74060b0a71ce457f97b742a8c
parent10c64e6aea87a75da6dff41a95ede1935282d71d
Add LiveRangeShrink pass to shrink live range within BB.

Summary: LiveRangeShrink pass moves instruction right after the definition with the same BB if the instruction and its operands all have more than one use. This pass is inexpensive and guarantees optimal live-range within BB.

Reviewers: davidxl, wmi, hfinkel, MatzeB, andreadb

Reviewed By: MatzeB, andreadb

Subscribers: hiraditya, jyknight, sanjoy, skatkov, gberry, jholewinski, qcolombet, javed.absar, krytarowski, atrick, spatel, RKSimon, andreadb, MatzeB, mehdi_amini, mgorny, efriedma, davide, dberlin, llvm-commits

Differential Revision: https://reviews.llvm.org/D32563

llvm-svn: 302938
60 files changed:
llvm/include/llvm/CodeGen/Passes.h
llvm/include/llvm/InitializePasses.h
llvm/lib/CodeGen/CMakeLists.txt
llvm/lib/CodeGen/CodeGen.cpp
llvm/lib/CodeGen/LiveRangeShrink.cpp [new file with mode: 0644]
llvm/lib/CodeGen/TargetPassConfig.cpp
llvm/test/CodeGen/AArch64/arm64-ccmp.ll
llvm/test/CodeGen/AArch64/arm64-misched-multimmo.ll
llvm/test/CodeGen/NVPTX/sched1.ll
llvm/test/CodeGen/NVPTX/sched2.ll
llvm/test/CodeGen/NVPTX/vec8.ll
llvm/test/CodeGen/SPARC/LeonItinerariesUT.ll
llvm/test/CodeGen/X86/2007-01-08-InstrSched.ll
llvm/test/CodeGen/X86/avg.ll
llvm/test/CodeGen/X86/avx-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/avx.ll
llvm/test/CodeGen/X86/avx512-cmp-kor-sequence.ll
llvm/test/CodeGen/X86/avx512-gather-scatter-intrin.ll
llvm/test/CodeGen/X86/avx512-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512-intrinsics.ll
llvm/test/CodeGen/X86/avx512-mask-spills.ll
llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512cdvl-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512cdvl-intrinsics.ll
llvm/test/CodeGen/X86/avx512dq-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512dq-intrinsics.ll
llvm/test/CodeGen/X86/avx512dqvl-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512dqvl-intrinsics.ll
llvm/test/CodeGen/X86/avx512ifma-intrinsics.ll
llvm/test/CodeGen/X86/avx512ifmavl-intrinsics.ll
llvm/test/CodeGen/X86/avx512vl-intrinsics-upgrade.ll
llvm/test/CodeGen/X86/avx512vl-intrinsics.ll
llvm/test/CodeGen/X86/bswap_tree2.ll
llvm/test/CodeGen/X86/fold-tied-op.ll
llvm/test/CodeGen/X86/fp128-i128.ll
llvm/test/CodeGen/X86/haddsub-2.ll
llvm/test/CodeGen/X86/lrshrink.ll [new file with mode: 0644]
llvm/test/CodeGen/X86/madd.ll
llvm/test/CodeGen/X86/merge-consecutive-loads-128.ll
llvm/test/CodeGen/X86/misched-matrix.ll
llvm/test/CodeGen/X86/oddshuffles.ll
llvm/test/CodeGen/X86/pmul.ll
llvm/test/CodeGen/X86/pr29112.ll
llvm/test/CodeGen/X86/pr31088.ll
llvm/test/CodeGen/X86/rotate.ll
llvm/test/CodeGen/X86/sad.ll
llvm/test/CodeGen/X86/select.ll
llvm/test/CodeGen/X86/setcc-wide-types.ll
llvm/test/CodeGen/X86/shrink_vmul_sse.ll
llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
llvm/test/CodeGen/X86/sse1.ll
llvm/test/CodeGen/X86/sse3-avx-addsub-2.ll
llvm/test/CodeGen/X86/sse41.ll
llvm/test/CodeGen/X86/vec_int_to_fp.ll
llvm/test/CodeGen/X86/vector-bitreverse.ll
llvm/test/CodeGen/X86/vector-blend.ll
llvm/test/CodeGen/X86/vector-sqrt.ll
llvm/test/CodeGen/X86/x86-interleaved-access.ll