drm/i915: Fix 852GM/GMV cdclk
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Fri, 22 May 2015 08:22:32 +0000 (11:22 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Fri, 29 May 2015 08:15:27 +0000 (10:15 +0200)
commit65cd2b3fa521d1abec13dd36bf1bfc8f2469d8bc
tree2a339a437de8ec7bb0b731d2219db0b13e454e6c
parent1b1d27160dad5478f614f95ae5a87bd8382c5612
drm/i915: Fix 852GM/GMV cdclk

It seems 852GM/GMV uses a different HPLLCC encoding than the other
85x platforms. For 852GM/GMV cdclk is always 133MHz. Try to detect that
using the PCI revision (sinc the device ID seems useless for that). I'm
not at all sure this is a good idea, but according to the specs it
should work.

v2: Rebased to the latest
v3: Rebased to the latest

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> (v1)
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Acked-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c