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(parent: 0d1904e) | patch
drivers: media: arducam_64mp: Add V4L2_CID_LINK_FREQ control
authorLee Jackson <lee.jackson@arducam.com>
Wed, 10 Jan 2024 01:06:16 +0000 (09:06 +0800)
committerDom Cobley <popcornmix@gmail.com>
Mon, 19 Feb 2024 11:35:28 +0000 (11:35 +0000)
commit65baa9a4e2fced7e90289e39c284d3a46b95dcd1
tree42f648d2b603f1fb327db2e661c128d3480e2755tree | snapshot
parent0d1904e4105211e70f498a3d576acd527d3dd74ecommit | diff
drivers: media: arducam_64mp: Add V4L2_CID_LINK_FREQ control

Add V4L2_CID_LINK_FREQ as a read-only control with a value of 456 Mhz.
This will be used by the CFE driver to corretly setup the DPHY timing
parameters in the CSI-2 block.

Signed-off-by: Lee Jackson <lee.jackson@arducam.com>
drivers/media/i2c/arducam_64mp.c diff | blob | history
Domain: System / Kernel;