arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages
authorGeert Uytterhoeven <geert+renesas@glider.be>
Thu, 29 Apr 2021 12:39:12 +0000 (14:39 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Mon, 31 May 2021 08:43:09 +0000 (10:43 +0200)
commit659b38203f04f5c3d1dc60f1a3e54b582ad3841c
treed1172ad2a673ae12a59aaa76daa0c8207432fa90
parent44b615ac9fab16d1552cd8360454077d411e3c35
arm64: dts: renesas: r8a7796[01]: Fix OPP table entry voltages

Correct the voltages in the "Power Optimized" (<= 1.5 GHz) Cortex-A57
operating point table entries for the R-Car M3-W and M3-W+ SoCs from
0.82V to 0.83V, as per the R-Car Gen3 EC Manual Errata for Revision
0.53.

Based on a patch for R-Car M3-W in the BSP by Takeshi Kihara
<takeshi.kihara.df@renesas.com>.

Fixes: da7e3113344fda50 ("arm64: dts: renesas: r8a7796: Add OPPs table for cpu devices")
Fixes: f51746ad7d1ff6b4 ("arm64: dts: renesas: Add Renesas R8A77961 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b9e9db907514790574429b83d070c823b36085ef.1619699909.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/r8a77960.dtsi
arch/arm64/boot/dts/renesas/r8a77961.dtsi