iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK
authorZhen Lei <thunder.leizhen@huawei.com>
Wed, 24 Mar 2021 08:16:03 +0000 (16:16 +0800)
committerWill Deacon <will@kernel.org>
Thu, 25 Mar 2021 17:30:39 +0000 (17:30 +0000)
commit655c447c97d7fe462e6cd9e15809037be028bc70
treea6ee2c5afa51233ffae1044b9ce85274d6efb47d
parenta9aa2bb18ecbb8dd04a18d48e40d60e24ba9663d
iommu/arm-smmu-v3: add bit field SFM into GERROR_ERR_MASK

In arm_smmu_gerror_handler(), the value of the SMMU_GERROR register is
filtered by GERROR_ERR_MASK. However, the GERROR_ERR_MASK does not contain
the SFM bit. As a result, the subsequent error processing is not performed
when only the SFM error occurs.

Fixes: 48ec83bcbcf5 ("iommu/arm-smmu: Add initial driver support for ARM SMMUv3 devices")
Reported-by: Rui Zhu <zhurui3@huawei.com>
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Link: https://lore.kernel.org/r/20210324081603.1074-1-thunder.leizhen@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h