mx7ulp: Update wdog disable sequence
authorYe Li <ye.li@nxp.com>
Thu, 23 Sep 2021 14:01:15 +0000 (17:01 +0300)
committerStefano Babic <sbabic@denx.de>
Thu, 7 Oct 2021 14:53:50 +0000 (16:53 +0200)
commit64fe0ffca0cd088cf0d74f76f6cd503a844ace49
treedc0741b210fc7f7b8dceac080c6ccd76fdac9383
parente1918ce299a10797df0f0f8e3df992fd6ed89aa6
mx7ulp: Update wdog disable sequence

Update the mx7ulp wdog disable sequence to avoid potential reset
issue in unlock or refresh sequence. Both sequence need two words
write to wdog CNT register in 16 bus clocks window, if miss the
window, the write will cause violation in wdog and reset the chip.

Current u-boot code is using writel() function which has a DMB
barrier to order the memory access. The DMB between two words write
may introduce some delay in certain circumstance, causing the wdog
reset due to 16 bus clock window requirement.

Also, WDOG1 might have been enabled already depending on FUSE hence
we need to be as close as possible to its reconfiguration timing
requirement of 128 bus clock limit.

This patch replaces writel() function by __raw_writel() to avoid such
issue, and improve to check if watchdog is already disabled or
unlocked.

Signed-off-by: Ye Li <ye.li@nxp.com>
Co-developed-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Co-developed-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
arch/arm/mach-imx/mx7ulp/soc.c