ASoC: wm8960: Fix PLL register writes
authorMike Dyer <mike.dyer@md-soft.co.uk>
Fri, 16 Aug 2013 17:36:28 +0000 (18:36 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Fri, 27 Sep 2013 00:15:33 +0000 (17:15 -0700)
commit64c2a17997fe074edc5c10d8f687ba590c2c2572
tree99891eda840d41cc102df1ec183361d612e3bbdb
parenta7179b89a68c7cb6f8623cedcce02b98d9e072a1
ASoC: wm8960: Fix PLL register writes

commit 85fa532b6ef920b32598df86b194571a7059a77c upstream.

Bit 9 of PLL2,3 and 4 is reserved as '0'. The 24bit fractional part
should be split across each register in 8bit chunks.

Signed-off-by: Mike Dyer <mike.dyer@md-soft.co.uk>
Signed-off-by: Mark Brown <broonie@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
sound/soc/codecs/wm8960.c