riscv: fix misalgned trap vector base address
authorChen Lu <181250012@smail.nju.edu.cn>
Mon, 18 Oct 2021 05:22:38 +0000 (13:22 +0800)
committerPalmer Dabbelt <palmerdabbelt@google.com>
Wed, 27 Oct 2021 20:08:01 +0000 (13:08 -0700)
commit64a19591a2938b170aa736443d5d3bf4c51e1388
tree6d15e22973f2393400af5be00117a311edad2d9d
parent3ef6ca4f354c53abf263cbeb51e7272523c294d8
riscv: fix misalgned trap vector base address

The trap vector marked by label .Lsecondary_park must align on a
4-byte boundary, as the {m,s}tvec is defined to require 4-byte
alignment.

Signed-off-by: Chen Lu <181250012@smail.nju.edu.cn>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Fixes: e011995e826f ("RISC-V: Move relocate and few other functions out of __init")
Cc: stable@vger.kernel.org
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
arch/riscv/kernel/head.S