drm/i915/mtl: Fix HDMI/DP PLL clock selection
authorImre Deak <imre.deak@intel.com>
Wed, 13 Dec 2023 22:05:26 +0000 (00:05 +0200)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Mon, 1 Jan 2024 12:42:34 +0000 (12:42 +0000)
commit6472e3217fe5d01e10ef72cd26650b4f99591947
tree53cec5347e7f88c03ba0aa0911ea7de1b07dbcd1
parent80419c96f8e68ecdd79ea74497c36a61b3b2fc3f
drm/i915/mtl: Fix HDMI/DP PLL clock selection

[ Upstream commit dbcab554f777390d9bb6a808ed0cd90ee59bb44e ]

Select the HDMI specific PLL clock only for HDMI outputs.

Fixes: 62618c7f117e ("drm/i915/mtl: C20 PLL programming")
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Reviewed-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231213220526.1828827-1-imre.deak@intel.com
(cherry picked from commit 937d02cc79c6828fef28a4d80d8d0ad2f7bf2b62)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
drivers/gpu/drm/i915/display/intel_cx0_phy.c