Add SPIR-V tests for 16, 32 and 64-bit integers
New tests were added to test various SPIR-V bit operations,
comparators, constants and initializers with signed and unsigned
integers of different width.
In bit field and shift operations some of the parameters are not
required to have the same bit width as Base and Result. This kind of
operations are tested with all possible combinations of result type
and parameter bit width.
The result type of bit field operations is always a 32-bit integer.
New tests:
dEQP-VK.spirv_assembly.type.*.shift_right_logical*
dEQP-VK.spirv_assembly.type.*.shift_right_arithmetic*
dEQP-VK.spirv_assembly.type.*.shift_left_logical*
dEQP-VK.spirv_assembly.type.*.bitwise_or*
dEQP-VK.spirv_assembly.type.*.bitwise_xor*
dEQP-VK.spirv_assembly.type.*.bitwise_and*
dEQP-VK.spirv_assembly.type.*.not*
dEQP-VK.spirv_assembly.type.*.iequal*
dEQP-VK.spirv_assembly.type.*.inotequal*
dEQP-VK.spirv_assembly.type.*.ugreaterthan*
dEQP-VK.spirv_assembly.type.*.sgreaterthan*
dEQP-VK.spirv_assembly.type.*.ugreaterthanequal*
dEQP-VK.spirv_assembly.type.*.sgreaterthanequal*
dEQP-VK.spirv_assembly.type.*.ulessthan*
dEQP-VK.spirv_assembly.type.*.slessthan*
dEQP-VK.spirv_assembly.type.*.ulessthanequal*
dEQP-VK.spirv_assembly.type.*.slessthanequal*
dEQP-VK.spirv_assembly.type.*.bit_field_insert*
dEQP-VK.spirv_assembly.type.*.bit_field_s_extract*
dEQP-VK.spirv_assembly.type.*.bit_field_u_extract*
dEQP-VK.spirv_assembly.type.*.bit_reverse*
dEQP-VK.spirv_assembly.type.*.bit_count*
dEQP-VK.spirv_assembly.type.*.constant*
dEQP-VK.spirv_assembly.type.*.constant_composite*
dEQP-VK.spirv_assembly.type.*.constant_null*
dEQP-VK.spirv_assembly.type.*.variable_initializer*
dEQP-VK.spirv_assembly.type.*.spec_constant_initializer*
dEQP-VK.spirv_assembly.type.*.spec_constant_composite_initializer*
Components: Vulkan
VK-GL-CTS issue: 1096
Change-Id: Id1d6c5b741b52f5acc9c759e5cfcd8ac4825532d