ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller
authorSylwester Nawrocki <s.nawrocki@samsung.com>
Tue, 9 Apr 2013 14:52:21 +0000 (23:52 +0900)
committerKukjin Kim <kgene.kim@samsung.com>
Tue, 9 Apr 2013 15:09:30 +0000 (00:09 +0900)
commit646dd2f0a980949b05042792fbadd72b735c3eda
tree372fb8673199a4157235ffbbf4d66e3f0a55b10e
parentb530f742ac27460d41d35b638ad6aad92044a982
ARM: S3C24XX: Fix interrupt pending register offset of the EINT controller

The external pending interrupt register address (EINTPEND) offset is
0xa8, not 0x08. Without this patch the external interrupts are not
properly acknowledged, which may lead to an interrupt storm and the
system hang as soon as any external interrupt is requested.

Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
arch/arm/mach-s3c24xx/irq.c