clk: add support for Rockchip gate clocks
authorHeiko Stübner <heiko@sntech.de>
Thu, 13 Jun 2013 14:59:40 +0000 (16:59 +0200)
committerMike Turquette <mturquette@linaro.org>
Thu, 20 Jun 2013 22:58:27 +0000 (15:58 -0700)
commit646572c77db7c42beb3d091915c8f97359100c47
tree9aa0cf08d01b21c4ffcf796177970c38561479d6
parentc7f6e2d8ffce43e753c930bcb8b2230a321843af
clk: add support for Rockchip gate clocks

This adds basic support for gate-clocks on Rockchip SoCs.
There are 16 gates in each register and use the HIWORD_MASK
mechanism for changing gate settings.

The gate registers form a continuos block which makes the dt node
structure a matter of taste, as either all 160 gates can be put into
one gate clock spanning all registers or they can be divided into
the 10 individual gates containing 16 clocks each.
The code supports both approaches.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Documentation/devicetree/bindings/clock/rockchip.txt [new file with mode: 0644]
drivers/clk/Makefile
drivers/clk/rockchip/Makefile [new file with mode: 0644]
drivers/clk/rockchip/clk-rockchip.c [new file with mode: 0644]