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author	Craig Topper <craig.topper@sifive.com>
	Fri, 25 Nov 2022 16:57:34 +0000 (08:57 -0800)
committer	Craig Topper <craig.topper@sifive.com>
	Fri, 25 Nov 2022 16:59:27 +0000 (08:59 -0800)
commit	64612f5d8e35a47008554e646e5b434c4bf738ae
tree	49e890c69162320c76b607dbcb0de926df33364a	tree \| snapshot
parent	e4aad511e6f85499dcce59946eafb0a771a9be90	commit \| diff

[RISCV] Add ADD to getRegAllocationHints to improve to improve use of c.add.

add can always be compressed to c.add if one of the sources is the
same as the destination.

The same is not true for c.addw where the registers need to be x8-x15.

21 files changed:

llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp		diff \| blob \| history
llvm/test/CodeGen/RISCV/calling-conv-lp64-lp64f-lp64d-common.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/div-by-constant.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/div-pow2.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/div.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/mul.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rotl-rotr.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rv32zba.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/calling-conv-fastcc.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/extractelt-i1.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-elen.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/select-binop-identity.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/shadowcallstack.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/split-offsets.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/split-udiv-by-constant.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/srem-vector-lkk.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/uadd_sat_plus.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/umulo-128-legalisation-lowering.ll		diff \| blob \| history
llvm/test/CodeGen/RISCV/urem-vector-lkk.ll		diff \| blob \| history

Domain: System / Toolchain;

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