[AArch64][SVE] Add patterns to generate ADR instruction
authorUsman Nadeem <mnadeem@quicinc.com>
Sun, 12 Sep 2021 22:22:47 +0000 (15:22 -0700)
committerUsman Nadeem <mnadeem@quicinc.com>
Tue, 21 Sep 2021 22:50:49 +0000 (15:50 -0700)
commit645b8f5365de49cbced4286f86e4a149c56600d3
tree77d19acedb34c9fd5855404a37b51350fb806057
parent45c0ebe00efbc09750a808f1e95377b9ea1744c4
[AArch64][SVE] Add patterns to generate ADR instruction

Differential Revision: https://reviews.llvm.org/D109665

Change-Id: I9d2928688b80b804a16f52928e2057749ec2c0b2
llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
llvm/test/CodeGen/AArch64/sve-adr.ll [new file with mode: 0644]
llvm/test/CodeGen/AArch64/sve-gep.ll