x86: Import code from coreboot's libpayload to parse the coreboot table
authorGabe Black <gabeblack@chromium.org>
Mon, 5 Dec 2011 12:09:22 +0000 (12:09 +0000)
committerGraeme Russ <graeme.russ@gmail.com>
Mon, 19 Dec 2011 02:26:15 +0000 (13:26 +1100)
commit63f559cd12e64825df78c1774b707ac1782110c0
treee7920d4db917ad0f20069d5d3ea47a228d83d244
parentef5a5b004997a0759d6f5f3206a419f90d5ffac5
x86: Import code from coreboot's libpayload to parse the coreboot table

This change also forces the lib_sysinfo structure to be in the .data
section. Otherwise it ends up in the .bss section. U-boot assumes that it
doesn't need to copy it over during relocation, and instead fills that
whole section with zeroes. If we really were booting from ROM that would be
appropriate, but we need some information from the coreboot tables (memory
size) before then and have to fill that structure before relocation. We
skirt u-boot's assumption by putting this in .data where it assumes there
is still read only but non-zero data.

Signed-off-by: Gabe Black <gabeblack@chromium.org>
arch/x86/cpu/coreboot/Makefile
arch/x86/cpu/coreboot/ipchecksum.c [new file with mode: 0644]
arch/x86/cpu/coreboot/sysinfo.c [new file with mode: 0644]
arch/x86/cpu/coreboot/tables.c [new file with mode: 0644]
arch/x86/include/asm/arch-coreboot/ipchecksum.h [new file with mode: 0644]
arch/x86/include/asm/arch-coreboot/sysinfo.h [new file with mode: 0644]
arch/x86/include/asm/arch-coreboot/tables.h [new file with mode: 0644]
board/chromebook-x86/coreboot/coreboot.c