[LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions
authorXiaodong Liu <liuxiaodong@loongson.cn>
Wed, 4 Jan 2023 06:10:43 +0000 (14:10 +0800)
committerXiaodong Liu <liuxiaodong@loongson.cn>
Wed, 4 Jan 2023 06:11:30 +0000 (14:11 +0800)
commit63d46869ea5769693f7895be066f042929512e06
tree8788cf4408c0c4878a4c67646614c10c51b9e6e4
parent86616443bf8a525167136ec64a4cd9d1f5bc4106
[LoongArch] Add intrinsics for MOVFCSR2GR and MOVGR2FCSR instructions

Instruction formats:
`movgr2fcsr fcsr, rj`
`movfcsr2gr rd, fcsr`
MOVGR2FCSR modifies the value of the software writable field
corresponding to the FCSR (floating-point control and status
register) `fcsr` according to the value of the lower 32 bits of
the GR (general purpose register) `rj`.
MOVFCSR2GR sign extends the 32-bit value of the FCSR `fcsr`
and writes it into the GR `rd`.

Add "i32 @llvm.loongarch.movfcsr2gr(i32)" intrinsic for MOVFCSR2GR
instruction. The argument is FCSR register number. The return value
is the value in the FCSR.
Add "void @llvm.loongarch.movgr2fcsr(i32, i32)" intrinsic for MOVGR2FCSR
instruction. The first argument is the FCSR number, the second argument
is the value in GR.

Reviewed By: SixWeining, xen0n

Differential Revision: https://reviews.llvm.org/D140685
16 files changed:
clang/include/clang/Basic/BuiltinsLoongArch.def
clang/lib/CodeGen/CGBuiltin.cpp
clang/lib/Headers/larchintrin.h
clang/lib/Sema/SemaChecking.cpp
clang/test/CodeGen/LoongArch/intrinsic-la32-error.c
clang/test/CodeGen/LoongArch/intrinsic-la32.c
clang/test/CodeGen/LoongArch/intrinsic-la64-error.c
clang/test/CodeGen/LoongArch/intrinsic-la64.c
llvm/include/llvm/IR/IntrinsicsLoongArch.td
llvm/lib/Target/LoongArch/LoongArchFloat32InstrInfo.td
llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
llvm/lib/Target/LoongArch/LoongArchISelLowering.h
llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
llvm/test/CodeGen/LoongArch/intrinsic-error.ll
llvm/test/CodeGen/LoongArch/intrinsic-not-constant-error.ll
llvm/test/CodeGen/LoongArch/intrinsic.ll