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(parent: 5a772dc) | patch
Ensure a correct order between memory accesses.
authorHongbin Zheng <etherzhhb@gmail.com>
Tue, 16 Jul 2013 15:20:29 +0000 (15:20 +0000)
committerHongbin Zheng <etherzhhb@gmail.com>
Tue, 16 Jul 2013 15:20:29 +0000 (15:20 +0000)
commit63cc9467af2bf66768221e1b4ab427b671983632
treebe328b793a7e26c9d1ff8191fc3afc9e6b227329tree | snapshot
parent5a772dcd84a855ca3b06cc916331f9b974d7d4b6commit | diff
Ensure a correct order between memory accesses.

Ensure that the scalar write access corresponds to the result of a load
instruction appears after the generic read access corresponds to the load
instruction.

llvm-svn: 186419
polly/include/polly/TempScopInfo.h diff | blob | history
polly/lib/Analysis/TempScopInfo.cpp diff | blob | history
polly/test/TempScop/inter_bb_scalar_dep.ll [new file with mode: 0644] blob
polly/test/TempScop/intra_and_inter_bb_scalar_dep.ll [new file with mode: 0644] blob
polly/test/TempScop/intra_bb_scalar_dep.ll [new file with mode: 0644] blob
polly/test/TempScop/scalar_to_array.ll [new file with mode: 0644] blob
polly/test/TempScop/tempscop-printing.ll diff | blob | history
Domain: System / Toolchain;