Rewrite the MIPS simulator's memory model so that it uses the generic
authorAndrew Cagney <cagney@redhat.com>
Wed, 5 Nov 1997 08:17:26 +0000 (08:17 +0000)
committerAndrew Cagney <cagney@redhat.com>
Wed, 5 Nov 1997 08:17:26 +0000 (08:17 +0000)
commit63be8febf762353b62e794963fdc65f1280a7498
tree3d79e72b7f56c6597f4285efcc55562938d902ef
parent22de994d0e830082802fdd9033af16fb34f58dde
Rewrite the MIPS simulator's memory model so that it uses the generic
common/sim-core.

Add support for 3, 5, 6, 7 byte transfers to sim core.
sim/common/ChangeLog
sim/common/sim-core.c
sim/common/sim-n-core.h
sim/mips/ChangeLog
sim/mips/Makefile.in
sim/mips/interp.c
sim/mips/mips.igen
sim/mips/sim-main.h