RISC-V: Add arch functions for non-retentive suspend entry/exit
authorAnup Patel <anup.patel@wdc.com>
Thu, 10 Feb 2022 05:49:42 +0000 (11:19 +0530)
committerPalmer Dabbelt <palmer@rivosinc.com>
Thu, 10 Mar 2022 17:29:31 +0000 (09:29 -0800)
commit63b13e64a829e7b12fba81fccbea0d5448fc0c24
tree569b041c77fb2352a8890b5cdac5cedce6d04d88
parente1de2c93e78740383db1a0ff626d8ca2cdc28aaf
RISC-V: Add arch functions for non-retentive suspend entry/exit

The hart registers and CSRs are not preserved in non-retentative
suspend state so we provide arch specific helper functions which
will save/restore hart context upon entry/exit to non-retentive
suspend state. These helper functions can be used by cpuidle
drivers for non-retentive suspend entry/exit.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
arch/riscv/include/asm/asm.h
arch/riscv/include/asm/suspend.h [new file with mode: 0644]
arch/riscv/kernel/Makefile
arch/riscv/kernel/asm-offsets.c
arch/riscv/kernel/head.S
arch/riscv/kernel/suspend.c [new file with mode: 0644]
arch/riscv/kernel/suspend_entry.S [new file with mode: 0644]