isl: remove the cache line size alignment requirement
authorSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Fri, 15 Feb 2019 08:07:29 +0000 (09:07 +0100)
committerSamuel Iglesias Gonsálvez <siglesias@igalia.com>
Wed, 20 Feb 2019 07:28:31 +0000 (08:28 +0100)
commit63a919a3ceed705b01c4bf31dbbef28997b04d6c
treee01004baae09cda795dbabcd8dd2826edf228f20
parent572854e706043353d28aa41e6dc7bbdc35de8029
isl: remove the cache line size alignment requirement

The cacheline size was a requirement for using the BLT engine, which
we don't use anymore except for a few things on old HW, so we drop it.

Fixes CTS's CL#3500 test:

dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.r8g8b8_unorm

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias@igalia.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
src/intel/isl/isl.c