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(parent: 8fb3a63) | patch
drm/amd/display: have two different sr and pstate latency tables for renoir
authorJoseph Gravenor <joseph.gravenor@amd.com>
Fri, 8 Nov 2019 19:30:34 +0000 (14:30 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 5 Dec 2019 21:28:50 +0000 (16:28 -0500)
commit639dcfc6feb5c7451d1382c5d3fa1fd679eca544
tree62ee7f6e7239639be4ac0ae524e69778168f794btree | snapshot
parent8fb3a6363684b5f00e7b438e22fc17346711f4facommit | diff
drm/amd/display: have two different sr and pstate latency tables for renoir

[Why]
new sr and pstate latencies are optimized for the case when we are not
using lpddr4 memory

[How]
have two different wm tables, one for the lpddr case and one for
non lpddr case

Signed-off-by: Joseph Gravenor <joseph.gravenor@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/rn_clk_mgr.c diff | blob | history
Domain: System / Kernel;