[lldb] Use llvm::MC for register numbers in AArch64 ABIs

[lldb] Use llvm::MC for register numbers in AArch64 ABIs

Summary:
This is equivalent to previous patches (e.g. 07355c1c0) for the x86 ABIs.

One name fixup is needed -- lldb refers to the floating/vector registers by
their vector name (vN). Llvm does not use this name, so we map it to qN,
representing the register as a single 128 bit value (this choice is fairly
arbitrary -- any other name would also work fine as they all have the same
DWARF number).

Reviewers: JDevlieghere, jasonmolenda, omjavaid

Reviewed By: omjavaid

Subscribers: clayborg, danielkiss, aprantl, kristof.beyls, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D75607