mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output
authorHaibo Chen <haibo.chen@nxp.com>
Wed, 3 Mar 2021 09:05:46 +0000 (17:05 +0800)
committerStefano Babic <sbabic@denx.de>
Thu, 8 Apr 2021 21:44:40 +0000 (23:44 +0200)
commit63756575b42b8b4fb3f59cbbf0cedf03331bc2d2
tree588f99ca8cff444255aad60793e42b082e8c5e27
parentdec7755c442ff84358704a5566e4ae908afecf13
mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output

For FSL_USDHC, it do not implement VENDORSPEC_CKEN/PEREN/HCKEN/IPGEN, these
are reserved bits. Instead, use VENDORSPEC_FRC_SDCLK_ON to gate on/off the
card clock output.

After commit b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support"),
we meet SD3.0 card can't work at UHS mode, mmc_switch_voltage() fail because
the second mmc_wait_dat0 return -ETIMEDOUT. According to SD spec, during
voltage switch, need to gate off/on the card clock. If not set the FRC_SDCLK_ON,
after CMD11, hardware will gate off the card clock automatically, so card do
not detect the clock off/on behavior, so will draw the data0 line low until
next command.

Fixes: b5874b552ffa ("mmc: fsl_esdhc_imx: add wait_dat0() support")
Tested-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
drivers/mmc/fsl_esdhc_imx.c
include/fsl_esdhc_imx.h