aarch64: Use RTL builtins for polynomial vsli[q]_n intrinsics

aarch64: Use RTL builtins for polynomial vsli[q]_n intrinsics

Rewrite vsli[q]_n_p* Neon intrinsics to use RTL builtins rather than
inline assembly code, allowing for better scheduling and
optimization.

gcc/ChangeLog:

2021-02-10  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Use VALLP mode
	iterator for polynomial ssli_n builtin generator macro.
	* config/aarch64/arm_neon.h (vsli_n_p8): Use RTL builtin
	instead of inline asm.
	(vsli_n_p16): Likewise.
	(vsliq_n_p8): Likewise.
	(vsliq_n_p16): Likewise.
	* config/aarch64/iterators.md: Define VALLP mode iterator.