[Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register set
authorNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Tue, 4 Oct 2016 11:25:52 +0000 (11:25 +0000)
committerNemanja Ivanovic <nemanja.i.ibm@gmail.com>
Tue, 4 Oct 2016 11:25:52 +0000 (11:25 +0000)
commit6354d235559477ce0c290f85919cd49c77909231
tree500f82b489e3e5b551abf91338960a72b82aef6d
parentef445b7824152f0dba32823fd89b3a76878c8557
[Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register set

This patch corresponds to review:

The newly added VSX D-Form (register + offset) memory ops target the upper half
of the VSX register set. The existing ones target the lower half. In order to
unify these and have the ability to target all the VSX registers using D-Form
operations, this patch defines Pseudo-ops for the loads/stores which are
expanded post-RA. The expansion then choses the correct opcode based on the
register that was allocated for the operation.

llvm-svn: 283212
17 files changed:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/lib/Target/PowerPC/PPCInstrVSX.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/VSX-DForm-Scalars.ll [new file with mode: 0644]
llvm/test/CodeGen/PowerPC/bitcasts-direct-move.ll
llvm/test/CodeGen/PowerPC/float-to-int.ll
llvm/test/CodeGen/PowerPC/i64-to-float.ll
llvm/test/CodeGen/PowerPC/mcm-12.ll
llvm/test/CodeGen/PowerPC/mcm-4.ll
llvm/test/CodeGen/PowerPC/ppc64-align-long-double.ll
llvm/test/CodeGen/PowerPC/ppc64le-aggregates.ll
llvm/test/CodeGen/PowerPC/pr25157-peephole.ll
llvm/test/CodeGen/PowerPC/pr25157.ll
llvm/test/CodeGen/PowerPC/swaps-le-6.ll
llvm/test/CodeGen/PowerPC/vsx-spill.ll
llvm/test/CodeGen/PowerPC/vsx_insert_extract_le.ll
llvm/test/CodeGen/PowerPC/vsx_scalar_ld_st.ll