drm/i915/guc: unify guc irq handling
authorDaniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Sat, 13 Jul 2019 10:00:10 +0000 (11:00 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 13 Jul 2019 18:58:08 +0000 (19:58 +0100)
commit633023a4e61885c0c9ceefed0865ec0063940616
treedb8ae93ecfd9abba879020b3fd07748aee99d0dd
parent9cbd51c2c0edbafdaab7f0fa7569d1f455113a9b
drm/i915/guc: unify guc irq handling

The 16-bit guc irq vector is unchanged across gens, the only thing that
moved is its position (from the upper 16 bits of the PM regs to its own
register). Instead of duplicating all defines and functions to handle
the 2 different positions, we can work on the vector and shift it as
appropriate. While at it, update the handler to work on intel_guc.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20190713100016.8026-5-chris@chris-wilson.co.uk
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_guc_reg.h